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COMPANY PRESENTS NEW TECHNIQUE AT SPIE MICROLITHOGRAPHY SYMPOSIUM
It uses a set of patented techniques and custom software to produce advanced photomasks using extremely high transmission rates, enabling very low k1 imaging. MaskTools is working with some of the world's leading semiconductor manufacturers to adopt this technology as a 70nm production solution. So far, CPL results have indicated that depth of focus greater than 400nm is achievable for contacts and dense lines at the 70nm node. CPL technology is a key part of the company's technical presence at the 2002 SPIE Microlithography Symposium, being held March 3-8 at the Santa Clara Convention Center. Resolution enhancement techniques such as phase shift masks, optical proximity correction and off axis illumination enabled the extension of optical lithography beyond what was believed to be its limit as recently as a few years ago. These techniques allow lithographers to print wafers with feature sizes smaller than the wavelength of light used to expose them. However, in order to meet the demands of the next generation of semiconductors, the industry will have to adopt new technologies such as CPL, which require new lithography software and mask design strategies. "Chromeless phase lithography is an emerging technology that will enable the semiconductor industry to extend optical lithography beyond what can be achieved with today's resolution enhancement techniques," said Dinesh Bettadapur, president and CEO of MaskTools. "During the SPIE Microlithography Symposium, we will provide details of this technology and present some very promising wafer imaging results." At the 2002 SPIE Microlithography Symposium, MaskTools and its partners are presenting a total of 12 papers and posters. The presentations cover a number of potential solutions addressing some of the toughest issues facing lithographers today.
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