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News

Short lifetimes of nanometre chips are centre-stage in the obsolescence debate

Component Obsolescence Group (COG) : 14 June, 2005  (Company News)
Arguably today's biggest dilemma for designers of military and aerospace systems is how to deal with the dramatic reduction in chip operating life caused by the semiconductor industry's move to nanometre processes which is entirely geared towards throwaway consumer products.
Arguably today's biggest dilemma for designers of military and aerospace systems is how to deal with the dramatic reduction in chip operating life caused by the semiconductor industry's move to nanometre processes which is entirely geared towards throwaway consumer products.

COTS chip lifetimes have now dropped to as little as three years in some cases - not a problem for makers of mobile phones, but a major one for anyone making hi-rel equipment.

'We don't think the nanocircuit products the semiconductor manufacturers are now supplying are necessarily robust enough for military, aerospace, transport and automotive applications,' says Roger Vance, a consultant on component obsolescence to key figures in the defence industry.

This lifetime problem will be top of the agenda at a major conference in Cardiff starting on the 27 June, run by Component Obsolescence Group, which includes speakers from the US DoD, the MoD, Westinghouse Rail, Rochester Electronics and BAE Systems.

Part of the challenge, says Vance, who has organised the event, is that there is no business case for semiconductor manufacturers to serve hi-rel markets as they constitute such a small percentage of sales.

When COTS chip lifetimes were tens of years, this did not matter, but now it is reaching crisis point. What is more, having designed and issued a product, chip makers are still seeing if they can save more money by trimming the process specifications progressively. 'This information doesn't necessarily find its way to the users so the product they buy down the line at a later date, isn't even at the same standard as the product which the design was built around,' adds Vance.

The most important research into chip lifetimes is going on at Defence Micro Electronics Activity, a DoD laboratory founded to provide long term support for the microcircuit technologies required for defence systems.

DMEA has extensive design and test facilities and is expert in reverse engineering. It also manufactures chips that are required, but are unavailable, on its $200m plus flexible fab, a facility that makes chips on any semiconductor process technology.

Both Ted Glum, DMEA's director and Dr Gary Gaugler, a DMEA researcher, will speak at the conference about their latest work. For example, the DMEA has recently analysed a small sample of the latest semiconductors and the robustness tests resulted in 100 per cent failure, according to Vance.

Gaugler will present the latest photographic evidence of what is happening at the atomic level in such circuits. His work focuses on electromigration and metal-interconnect degradation using electron backscatter diffraction analysis in a scanning electron microscope.

Electromigration is the movement of metal interconnect material so that it is depleted in some areas and built up in others. This is caused by electron wind; the force exerted by conducting electrons. 'The tracks of modern microcircuits are so close together and so thin that they either break because of the voiding or they short-circuit across,' explains Vance.

Another source of consternation is the increasing impact of single event upsets where cosmic rays pass through the devices and cause circuits to switch. The transistors in nanometre-scale circuits are so close together that one cosmic ray can cause switching in several transistors at once so you get multiple effects from one event, according to Vance.

Joe Chapman, of the US Defence Standards Programme Office is looking into this and is working closely with semiconductor manufacturers on device de-rating as a means of extending lifetimes and reducing failure rates.

Running parallel to the chip-life crisis, is the question of how you ensure that millions spent on software development is not wasted when the hardware becomes obsolete?

Sam Calloway, F15 programme officer at the Robins Air Force Base in the USA, will present a paper showing how a microprocessor was designed in VHDL to emulate a MDC281 mil-std 1750-architecture processor. Keith Bergevin of the DMEA will describe an alternative approach applied to the US Sea Sparrow missile. A traditional upgrade of this microprocessor would have required a rewrite of the mission software costing over $20m.

Curtiss-Wright Controls Embedded Computing is typical of the defence firms having to grapple with these issues on a daily basis. CWCEC, which makes graphics and video boards, is using FPGAs as part of the answer.

'By building our graphics engines into FPGAs, we have more control over the long-term supply,' explains David Johnson a senior product manager at CWCEC. 'The FPGA may go obsolete but we can port the IP to a different part. Details in the way it's implemented in the FPGA may change but the software will remain the same and often that's the lion's share of the cost and development.'

Other firms may be able to find old technology devices that will work for longer, says Peter Marston, business development and technical consultant to Rochester Electronics, a firm which buys processes and IPR so it can make 'trailing edge' chips.

Marston is presenting a paper about the hidden costs of aftermarket solutions: 'There are the costs of re-qualifying the system and in some cases, because the new device is only emulating the original part, it might not work the same way in the application,' he explains. He will also be one of a number of speakers talking about how the ROHS and WEEE directives may exacerbate obsolescence problems.

'Manufacturers may decide that redesigning hi-rel or aging products to meet the directives doesn't represent a good business case because potential sales volumes aren't large enough,' says Marston.
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